Room-Temperature Steel Bonding Know-how That Facilitates The Fabrication of 3D-ICs & 3D Integration With Heterogeneous Gadgets

A technical paper titled “Room-Temperature Direct Cu Semi-Additive Plating (SAP) Bonding for Chip-on-Wafer 3D Heterogenous Integration With μLED” was printed by researchers at Tohoku College in Japan.

“This letter describes a direct Cu bonding expertise to there-dimensionally combine heterogeneous dielets primarily based on a chip-on-wafer configuration. 100- μm -cubed blue μ LEDs briefly adhered on a photosensitive resin are interconnected by semi-additive plating (SAP) with out thermal compression bonding. By utilizing SAP bonding, a variety of dielets might be stacked on skinny 3D-IC chiplets. The next three key applied sciences are utilized to unravel the yield problems with SAP bonding. After pick-and-place meeting, extra coplanarity enhancement eliminates Cu bridges grown to a small hole between the μ LEDs and photosensitive resin. The μ LEDs arrays with sidewalls insulated by room-temperature ozone-ethylene-radical (OER)-SiO2-CVD are efficiently bonded on sapphire wafers and a skinny 3D-IC with through-Si by way of (TSV). Additional design optimization is required, however partial seed pre-etching works properly to extend the yield. Absolutely built-in module implementation with the 3D-ICs would be the subsequent stage, nevertheless, we talk about a superior prospect for yield enhancement towards practically 100%.”

Discover the technical paper right here. Revealed Jan. 2023.  A college information article might be discovered right here.

Y. Susumago et al., “Room-Temperature Direct Cu Semi-Additive Plating (SAP) Bonding for Chip-on-Wafer 3D Heterogenous Integration With μLED,” in IEEE Electron Machine Letters, vol. 44, no. 3, pp. 500-503, March 2023, doi: 10.1109/LED.2023.3237834.

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